AMD HIP Programming Guide
A comprehensive technical manual for the Heterogeneous-compute Interface for Portability (HIP). It provides a C++ Runtime API and kernel language that allows developers to create portable applications for AMD and NVIDIA GPUs from a single source code. The guide covers installation, environment configuration, programming models, memory allocation, and tools for porting CUDA code to HIP.
Lessons
Lesson
Course Overview
📚 Content Summary
A comprehensive technical manual for the Heterogeneous-compute Interface for Portability (HIP). It provides a C++ Runtime API and kernel language that allows developers to create portable applications for AMD and NVIDIA GPUs from a single source code. The guide covers installation, environment configuration, programming models, memory allocation, and tools for porting CUDA code to HIP.
Master portable GPU programming: One source for both AMD and NVIDIA platforms.
Author: Advanced Micro Devices, Inc. (AMD)
Acknowledgments: AMD, the AMD Arrow logo, AMD Instinct, Radeon, ROCm and combinations thereof are trademarks of Advanced Micro Devices, Inc. Linux is a registered trademark of Linus Torvalds. PCIe is a registered trademark of PCI-SIG Corporation.
🎯 Learning Objectives
- Define the primary features and value propositions of the HIP framework.
- Demonstrate how to access and query the HIP environment using system tools.
- Explain the architectural relationship between HIP portability and its compiler technology.
- Execute platform-specific installations for both NVIDIA and AMD environments.
- Coordinate the multi-repository build process to compile HIP from source code.
- Validate a successful installation using system configuration and verification tools.
- Configure and manage GPU memory using HIP allocation, coherency controls, and zero-copy host memory visibility.
- Develop high-performance kernels using HIP-specific function/variable qualifiers, vector types, and synchronization primitives.
- Implement advanced parallel algorithms utilizing warp shuffle, vote, ballot, and cooperative group functions.
- Automate the translation of CUDA code to HIP using HIPIFY tools and manage in-place project conversions.
🔹 Lesson 1: Introduction to HIP Portability and Architecture
Overview: This lesson covers the foundational aspects of the Heterogeneous-compute Interface for Portability (HIP). It focuses on the core features that define HIP, the primary methods for accessing the HIP environment, and the underlying compiler technology that enables seamless portability across different GPU architectures (AMD and NVIDIA).
Learning Outcomes:
- Define the primary features and value propositions of the HIP framework.
- Demonstrate how to access and query the HIP environment using system tools.
- Explain the architectural relationship between HIP portability and its compiler technology.
🔹 Lesson 2: Installing and Verifying the HIP Environment
Overview: This lesson provides a technical guide for setting up the HIP (Heterogeneous-compute Interface for Portability) environment across different hardware platforms. It covers the specific installation steps for AMD and NVIDIA backends, the complex process of building the HIP runtime from source repositories, and the final verification procedures to ensure system readiness for GPU development.
Learning Outcomes:
- Execute platform-specific installations for both NVIDIA and AMD environments.
- Coordinate the multi-repository build process to compile HIP from source code.
- Validate a successful installation using system configuration and verification tools.
🔹 Lesson 3: HIP Programming Model and API Deep Dive
Overview: This lesson provides a comprehensive exploration of the Heterogeneous-Compute Interface for Portability (HIP) programming model. It covers the foundational API for memory management and kernel execution, the nuances of the HIP kernel language (including qualifiers and built-in variables), and advanced features such as warp-level primitives, cooperative groups, and specialized math intrinsics.
Learning Outcomes:
- Configure and manage GPU memory using HIP allocation, coherency controls, and zero-copy host memory visibility.
- Develop high-performance kernels using HIP-specific function/variable qualifiers, vector types, and synchronization primitives.
- Implement advanced parallel algorithms utilizing warp shuffle, vote, ballot, and cooperative group functions.
🔹 Lesson 4: Transitioning and Porting CUDA Applications to HIP
Overview: This lesson covers the systematic process of migrating CUDA source code to the HIP (Heterogeneous-Compute Interface for Portability) framework. It details the use of automation tools like HIPIFY, strategies for project conversion, identifying platform-specific compiler behaviors (HIP-Clang vs. NVIDIA), and managing architectural differences.
Learning Outcomes:
- Automate the translation of CUDA code to HIP using HIPIFY tools and manage in-place project conversions.
- Differentiate between AMD and NVIDIA target platforms and compilers using preprocessor macros and environment queries.
- Implement architectural feature checks (HIP_ARCH) and apply workarounds for specialized CUDA functions like
memcpyToSymbol.